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      ASIC Test Methodology/Simulation Engineer Interview

      26 Aug 2011
      Anonymous interview candidate
      San Diego, CA
      No offer
      Negative experience
      Difficult interview

      Application

      The process took 1 day. I interviewed at Qualcomm (San Diego, CA) in Jul 2011

      Interview

      I applied for ASIC Test Methodology / Simulation Engineers through career builder in july. Got a email after two weeks for scheduling a phone interview with them. 1)Interviewer explained about the job and what they do in their job. And asked me to explain how i fit in that job. 2) when i told about the vlsi testing course that i am pursuing this quarter. she asked me bunch of questions from vlsi testing. 3) what is ATPG. 3) then asked lot of questions based on analog. like i did few projects related to analog. i had ADC in my resume she asked me lot of questions on ADC. like how do you check the output of adc.Asked aboDNL. if the output of ADC is given to the i/p of SOC and the output of soc is faulty how you check that the adc output is correct or faulty. or if soc is working perfeclty fine how would you determine the fault in adc o/p. few more questions on my resume. decribe the cmos inverter and its I V characteristic. few questions on verilog. few questions on vhdl. some questions on timing. what is sfdr. some questions related to vlsi testing.

      Interview questions [1]

      Question 1

      Flash adc can be used for 15 bit.
      1 Answer

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