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      Marvell Technology

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      Marvell Technology interviewsMarvell Technology Design Verification Intern interviewsMarvell Technology interview


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      3.9★Compensation and benefits

      Design Verification Intern Interview

      25 Mar 2021
      Anonymous employee
      Austin, TX

      Other Design Verification Intern interview reviews for Marvell Technology

      Design Verification Intern Interview

      14 Feb 2026
      Anonymous interview candidate
      Bangalore Rural
      No offer
      Accepted offer
      Positive experience
      Average interview

      Application

      I applied online. I interviewed at Marvell Technology (Austin, TX) in Feb 2021

      Interview

      I applied through the careers page from their website and got an email 1 month later asking for dates to schedule an interview. I was interviewed by 4 managers all with depth knowledge of the field. I even spoke to a person who worked in very niche field and was amazed. Interview was 30-45 mins asking basic questions on SV and memory's

      Interview questions [1]

      Question 1

      Calculate address lines required for memory. Puzzle . FIFO verification test cases. Why computer engineering
      Answer question
      Neutral experience
      Average interview

      Application

      I interviewed at Marvell Technology (Bangalore Rural)

      Interview

      College placement. Came for multiple roles, PD, DFT and DV internship. A written test followed by two technical and one HR round. I didnt get the HR call as the number of vacancies for DV role were less.

      Interview questions [1]

      Question 1

      System Verilog, UVM, STA and basic logic implementations.
      Answer question

      Design Verification Intern Interview

      10 Apr 2026
      Anonymous interview candidate
      Hsinchu
      No offer
      Positive experience
      Average interview

      Application

      I applied online. The process took 4 weeks. I interviewed at Marvell Technology (Hsinchu) in Jan 2026

      Interview

      During the interview, I introduced myself, explained my thesis, and answered follow-up questions related to my projects and research experience. I was also asked to implement a swap function using pointers and discuss some basic pointer concepts. In addition, the interviewer asked about the three key characteristics of design verification, my motivation for applying to Marvell DV, the challenges I faced in my project, how I solved problems, how I learn new things, and my understanding of UVM.

      Design Verification Intern Interview

      25 Sept 2025
      Anonymous interview candidate
      No offer
      Positive experience
      Average interview

      Application

      I applied through university. I interviewed at Marvell Technology

      Interview

      Campus recruiters held numerous interviews back to back in 30 min intervals on campus. They had you sitting outside in a waiting area and called students in for predetermined time slots

      Interview questions [1]

      Question 1

      Basic Truth tables for NAND, XNOR, and similar logic gates.
      Answer question