I applied online. The process took 4 weeks. I interviewed at Intel Corporation (Hillsboro, OR) in Mar 2010
Interview
I got phone call from senior engineer to schedule the telephonic interview on next day. Instead of question and answer type interview, it was discussion on what I knows and on my thesis topic. After 3-4 days they said I am selected for on-site interview. There were 6 1:1 rounds, all were technical. All interviewers were good and understanding. Hiring manager seemed bit busy. They covered all the courses and fundamental questions on them. They covered most of the scripting and other skills that is required for this position. On average it was straight forward interview and was not too tough. Questions included VLSI, ASIC, DSP, Microarchitecture and some algorithmic questions.
Interview questions [1]
Question 1
How can you detect the loop in single way linked list, using just one extra pointer?
very nice people. given 2 question one on system of the group and one for coding in binary search and recursion. we started by little talking and then a little bit on one of the project and then 2 questions
Interview questions [1]
Question 1
1. given graph and car with light sensor and we want to find the right spot of the dot on the graph. it was binary search classical
I applied online. I interviewed at Intel Corporation (Bengaluru) in May 2026
Interview
Deep whiteboard interview , was asked to draw graphs for non ideal characteristics for cmos design and pvt corners. Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
Interview questions [1]
Question 1
was asked to draw graphs for non ideal characteristics for cmos design and pvt corners.Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
This was the second round lasted about an hour or so. The first round was mostly about my work as I had 3 year experience and I had to walk them through the projects I did etc..,.
Interview questions [1]
Question 1
If the combination logic between 2 FF's is cut like an interface, how do you set_input_delay and set_output_delay for left and right partitions. The clock is the same for both.